More articles : » Coverage Driven ThoughtsIn today’s short post what I’ll try to do is share with you some of the recent trends and ideas that deal with coverage. I won’t go into much technical detail today in order not to wear you (and myself) out, but really - if I want to be more... » Ignorance Is A BlissThere is a rather confusing feature in Specman’s coverage engine that I would like to share with you today. I’ve met several people (including myself) who had been struggling to understand what was going on there and gave up Recently I was... » Verification Documents - Love Them, Hate Them, But You Can't Ignore ThemVerification Plan (or Test Plan) and Coverage Plan are two documents that specify the features to be tested in the verification process. The first document usually lists the DUT features that need to be covered and the latter - the coverage points... » Cadence, Synopsys, Mentor - This Is Our Wish ListAs the EDA industry seems to be making moves towards a Unified Verification Methodology (OVM + VMM) we thought this would be a great opportunity to share a couple of things that have been on our wish-list for quite a while. » VMM Hackers Guide - Shutting Down Atomic GeneratorsEverybody likes atomic generators. If you have a vmm_data class, all you have to do is add a quick macro line and you get a free VMM-compliant generator that you only need to instantiate in your environment. An atomic generator is a simple yet... Copyright © 2019 Think Verification - Tips & Insights on ASIC Verification. All Rights Reserved.
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