More articles : » Ignorance Is A BlissThere is a rather confusing feature in Specman’s coverage engine that I would like to share with you today. I’ve met several people (including myself) who had been struggling to understand what was going on there and gave up Recently I was... » To Do List 2010Introducing Philip Americus - a new guest blogger here on Think Verification. Phil is an ASIC veteran who's worked with every phase of ASIC design - from initial concept to tapeout, with an emphasis on verification, including management of both HW... » Packing In OVM-eThis example shows how to pack a struct into a list of Double Words (32 bit) keeping the original order. This time we got less talking, and more code: » Review - Verification Leadership SeminarHow many of you have tried to cut on coffee? or even quit drinking coffee altogether? I guess a lot. Well, personally I’ve given up on trying but you know what? there’s actually something worse than having 8 cups of coffee per day - it’s the... » DVT Eclipse - For SystemVerilog/Specman Code Developers3 years ago that was on our wish list. Now it is a reality - A modern programming environment for verifiers! Copyright © 2012 Think Verification - Tips & Insights on ASIC Verification. All Rights Reserved.
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